Peter hi,
Don’t get too hung up on what the “noise” related objective are, these tweaks do aim at noise but they are also aimed at a wider target. In addition to the -144db breakthrough and reduction of noise entering the DAC from the PC but I have always had it in mind to take a detailed look at the NOS1 with a view to seeing if it can be tweaked for an even more enjoyable sound. The hunt for noise in this post and looking at the DAC generally have come together here. My motive is primarily to do this for myself to enjoy but if this can help the community gain more enjoyment I am happy to share findings.
Too many variables Nick ! I wish it were different !!
So far I have provided no real information on what I have done so proberbly not the best time for this comment due to the absence of information (now addressed below).
So whatever you come up with, at least to me it can't tell it all because it is not my situation. Nor anyone's else ... This, btw, also includes the being active of one oscillator only, which I dedicate much difference to begin with. Good stuff (for sure), but we all don't have that ...
I understand your point about a common config but remember my perception of SQ change is relative to these “baseline” mods already being in place. If needed I can place the standard NOS clocks that I have back in my NOS for comparison but Paul has spent several hours listening to my system as it currently is and could probably take a view on the recent changes, I think the NOS1 tweaks make a fundamental difference so I don’t think it will be hard to spot the changes at all for Paul.
In the far (far) end the only thing with real merit is to measure jitter (its characteristics) at the output. And here it stops I'm afraid (I am not able to do that myself).
I agree, the NOS tweaks are all about improving Jitter performance by improving supply rail conditions. Neither of us have the equipment to measure jitter (not many do given the cost of the kit needed), however I’v worked on many devices over the years (USB cards, DACs, CD Players Transports and Audio interfaces etc) almost without exception they have responded to PSU bypass tuning measures used here so I am not especially surprised by what is happening.
Below I have given information / my rational to target the tweeks but I have intentionally not given details of how to apply them to avoid problems with folks getting in to trouble trying to applying them.
So the tweeks to the NOS1 USB board and the DAC board and the rational applied.
The focus has been on selecting locations in the digital processing chain that are likely to benefit from improved power supply. The chain considered consists of USB decoder => FPGA => FPGA => DACs (I am excluding the Anadco in this post). We both are both probably comfortable linking this approach with jitter reduction. There is an element of trial here but it not entirely a “hit and miss” process rather it is based on experience informed by the information you kindly provided.
I guess the starting point has been working out what could be done to address the I2S related noise that we discussed earlier in the this post but also there has been focus on what might help sound quality.
The NOS tweeks and their rational.
Observations
The NOS USB interface has a single regulated 3.2 volt supply to power 5 IC devices which presents a challenge getting a responsive low noise supply to all the important supply pins of the ICs (eg supply pins that power key points in the digital signal train). In the past I’v have experienced improvements in sound quality all the way up to placement of 7 separate shunt supplies to power various rails on just 3 active IC devices within a DAC, probably overkill here, but you get the picture.
There is a total of 570uf of capacitance at the point that the 3.3v PSU connects to the USB board. I think that this large cap may present a relatively “slow” response to transient power demands and will dominate speed that the 3.3v rail reacts.
The level of rail decoupling capacitance on the USB board is on the low side of what I’v seen before on “audio” boards. The board ICs have a dozen or more supply rail pins on the 5 devices these are decoupled by a few caps generally of 4.7uf on the 3.3v rail. The 2.5v and 1.2v regulators have 4.7uf each in their output rails. There are also 100nf decoupling caps on many of the power pins. I guess this is not that unusual but I have found many times that more good quality capacitance in the right places can help significantly.
On the DAC board the FPGA (which receives and distributes the I2S to the DACs) has a an SMD 3.3v regulator, I cannot determine the exact amount of decoupling capacitance on the 3.3v rail as it splits to the FPGA power pins but the physical size of the SMD caps make me think it may not be a lot.
So NOS changes:
USB Board
1) Remove the 470uf silmic and remain the 100u cap (I know this much capacitance may have been placed here for another purposes)
2) Place 33uf of capacitance at C1xx which I think may be the point that the USB and FPGA chip rails fork. (Significant)
3) Place 33uf of additional 3.3v rail bypass capacitance on the supply pin of the quadrant of the FPGA which is programmed to support I2S output processing. (Significant)
4) Place 33uf of additional 3.3v rail bypass capacitance on the supply pin of the quadrant of the FPGA which processes the Audio oscillator inputs and distributes timing to the rest of the FPGA. (Significant)
5) Add 33uf of additional bypass capacitance to the outputs of the regulators generating the 2.5v and 1.2v rails.
Only one of the targeted USB board cap placements i had in mind turned out not to improve sound quality and was reversed.
DAC Board1) Place 33uf of additional capacitance on the output of the 3.3v regulator that feed the FPGA on the board. This makes a very significant difference to SQ however I intend to tune the value further as I think 33uf is just a little to much in this location. The basis for this is a very slight drop in the remarkable top end sparkle that the USB board changes provide. EDIT 19/09/2013 I dropped the cap from 33uf to 4,7 then to no additional capacitance. After careful listening the sound is best with no changes to the board here so I would not suggest anything here now. That’s it….
First of all, to me it doesn't make much sense to put in Black Gates there. So, why do it in the first place but then with the focus on people not having them around. Thus, I'd say that any el cheapo cap will do the job here.
Regards the capacitors used, I happened to have Black Gates to hand. I do not want to heat stress and damage my PCBs so I do not want to be soldering and re-soldering to SMD pads and components so I went with the best caps I have which were the Black Gates. I have used Black Gates N Types may times for digital component PSU bypassing and got excellent results. I’m familiar with the likely SQ changes the Black Gates will give as they run in.
I really don’t want to get hung up on capacitor brands and types. My view is that the changes in SQ are so profound that I really think just adding the additional capacitance at these locations is likely to be much more important than the brand of cap used. The tweaks also happen to be cheap and relatively simple to implement, that ticks a lot of boxes for me.
I am very happy for Paul and Mani to come have listen and compare my DAC with these tweaks at mine or in their systems if they are interested. This will give a second opinion on effectiveness of the changes.
Best to get the changes and rational on the table so we can have an informed discussion both knowing the details. Happy to discuss how all this might be addressing jitter but ultimately theory linking PSU noise to jitter spectra and our ability to measure jitter may run out quickly meaning that we may have to listen, trust our ears, and trust experience (uncomfortable though this may be). After all, were the current 4.7uf and 100nf decoupling caps on the USB board selected specifically for their contribution to reproduced sound ? I’m guessing they were more likely selected following recommended values in the Data sheet for the devices / good practice for general decoupling, and since Audio is a niche application for FPGAs and USB decoders etc the recommendations probably do not really conceder what works best in an audio application. Just a thought….
Regards,
Nick
Ps Anadco observations to follow.
EDITS were to grammar and one of the tweaked cap values was given as 3.3 uf not 33 uf as intended.
EDITS 19/09/2013 remove change to DAC board after listening test see above.